Lattice Semiconductor
Small and low-power FPGAs from iCE40 to Avant, with free vendor tools, the Nexus 28 nm FD-SOI platform, and the best open-source toolchain support of any established vendor.
| Headquarters | Hillsboro, Oregon, USA |
|---|---|
| Website | www.latticesemi.com/ |
| Toolchain | Radiant (Nexus, Avant, iCE40 UltraPlus), Diamond (ECP5, MachXO2/3, CrossLink), Propel (SoC design), sensAI (ML models) |
| Licensing | Free licences for most devices in both Radiant and Diamond; Avant and some large parts need a paid licence at the time of writing |
| Updated | 13 Nov 2026 |
Device families #
| Family | Process | Logic | Positioning |
|---|---|---|---|
| iCE40 LP / HX | 40 nm | 384-7,680 LUTs | Tiny, cheap, ultra-low standby power |
| iCE40 UltraPlus | 40 nm | 2.8k-5.3k LUTs | Always-on sensor and edge tasks with 1 Mb of SPRAM and 8 DSP blocks |
| MachXO2 / MachXO3 | 65 nm | 256-9,400 LUTs | Instant-on glue logic and board control with on-chip flash |
| MachXO5-NX | 28 nm FD-SOI | 25k-53k LUTs | Larger control-plane FPGA on the Nexus platform |
| ECP5 | 40 nm | 12k-85k LUTs | Low-cost mid-range with up to 5 Gb/s SERDES on 5G parts |
| CrossLink / CrossLink-NX | 40 nm / 28 nm FD-SOI | 5.9k (CrossLink) and 17k-40k (NX) LUTs | Video bridging with hard MIPI D-PHY |
| Certus-NX | 28 nm FD-SOI | 17k-40k LUTs | General purpose, PCIe Gen2 and 5 Gb/s SERDES, low soft-error rate |
| CertusPro-NX | 28 nm FD-SOI | 50k-100k LUTs | Largest Nexus part with 10 Gb/s SERDES and LPDDR4 |
| Avant (Avant-E, Avant-G, Avant-X) | 16 nm | about 200k-637k logic cells | Mid-range entry with 25 Gb/s SERDES and hard DDR |
Who they are
This page is for anyone choosing a small FPGA, and for the large group of people who want to use fully open-source tools on real silicon. Lattice was founded in 1983 and spent its early decades on CPLDs and small PLDs. The iCE40 line came with the 2011 purchase of SiliconBlue, and the ECP5 and MachXO lines came from Lattice’s own development. Since 2019 the company has concentrated on low-power, small-package devices on the Nexus 28 nm FD-SOI platform, and in 2022 it added the 16 nm Avant family to compete in the mid-range for the first time.
Lattice sells into servers (board management, root of trust), industrial equipment, automotive and consumer cameras. It is the vendor whose parts you are most likely to find on a hobby board, because they are cheap, come in hand-solderable packages and work with Yosys and nextpnr.
Toolchain
There are two vendor tools and the split matters. Radiant covers iCE40 UltraPlus, every Nexus family (CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX) and Avant. Diamond covers ECP5, MachXO2, MachXO3, CrossLink and the older iCE40 LP and HX parts use the separate iCEcube2. Both run on 64-bit Windows and Linux. Both ship the Lattice Synthesis Engine and a bundled Synplify Pro, and both include a limited ModelSim or Questa build. Free licences for most devices are issued on the website and renewed yearly. Avant needs a paid licence at the time of writing. Propel is the SoC builder with RISC-V soft cores, and sensAI packages neural network accelerators for edge vision.
The open-source route is often simpler. Yosys, nextpnr and openFPGALoader support iCE40 and ECP5 completely, and the Nexus families partially through Project Oxide. For an iCE40 or ECP5 board, the vendor tool is optional and many users never install it. See the open-source ecosystem page for details.
Pain points: Diamond is old and its Linux support is thinner than its Windows support. iCEcube2 is older still. The licence renewal is a yearly chore. Radiant’s timing constraints use a Lattice-specific dialect inside a .pdc file.
Boards to start with
- The iCEBreaker (iCE40 UP5K) is the best-documented open-source board and the reference target for many tutorials.
- The UPduino v3 is the cheapest way to get the same device on a breadboard.
- The iCEstick (iCE40 HX1K) is tiny and old but still a fine first board.
- The ULX3S and the OrangeCrab are the two common ECP5 boards, with the ULX3S carrying far more I/O.
- The CertusPro-NX evaluation board is the vendor route into the Nexus platform.
Migration notes
Coming from AMD or Altera, the devices are small, so plan for fewer LUTs, fewer global clocks (eight on iCE40, with limits on which pins can drive them) and fewer block RAMs. There is no equivalent of the ILA on iCE40, and Reveal, the vendor logic analyser, works on the larger parts only.
Primitives carry an SB_ prefix on iCE40 (SB_PLL40_CORE, SB_IO, SB_RAM40_4K), an EHXPLLL and DCUA naming on ECP5, and a different set again on Nexus. Diamond physical constraints are in .lpf files with LOCATE COMP and IOBUF PORT syntax. Radiant uses .pdc with ldc_set_location and ldc_set_port commands plus SDC-style timing. In the open-source flow, iCE40 uses a .pcf pin file and ECP5 uses the same .lpf syntax as Diamond, and timing is a --freq argument or a clock constraint in the pin file.
Memory inference is reliable on all families. On iCE40 UltraPlus the 1 Mb single-port SPRAM blocks must be instantiated explicitly. DSP inference works on UltraPlus and ECP5 but is limited.
Watch for
The Radiant and Diamond split means a MachXO3 design and a MachXO5-NX design use different tools with different constraint formats. Avant is new, has fewer boards and is not covered by the free licence. The iCE40 I/O is 3.3 V tolerant only within its bank voltage, and the UltraPlus has only one 3.3 V-capable bank on some packages. SERDES on ECP5 is 5 Gb/s on the 5G parts only, and the open-source support for it is functional but less polished than the logic fabric support. The Nexus FD-SOI parts are marketed on low soft-error rate, which is true but not a substitute for a radiation-qualified device.