Topic hubs
Each hub gives you the lie of the land, a learning path through the relevant lessons, reference tables, and the latest news and papers on that subject.
FPGA architecture
LUTs, routing, block RAM, DSP slices and clocking.
02Hardware description languages
VHDL, Verilog, SystemVerilog and the generators above them.
03High-level synthesis
Turning C, C++ and SYCL into RTL, and when that pays off.
04Verification
Testbenches, cocotb, UVM, formal and CI for hardware.
05Timing closure and constraints
STA, XDC and SDC, clock domain crossing and resets.
06SoC FPGAs
Zynq, Versal, Agilex SoC and PolarFire SoC with Linux.
07Soft processors
MicroBlaze V, Nios V, VexRiscv, NEORV32 and LiteX.
08High-speed I/O
Transceivers, PCIe, Ethernet, DDR, HBM and JESD204.
09DSP on FPGA
Fixed point, DSP slices, filters, FFTs and CORDIC.
10Wireless and SDR
RFSoC, OFDM, LDPC, 5G NR blocks and GNU Radio offload.
11Image and video processing
Cameras, displays, streaming pipelines and bandwidth
12AI and machine learning on FPGA
Quantised inference, dataflow and overlay accelerators
13Hardware security
Bitstream protection, secure boot, PUFs and side channels
14Open-source toolchains
Yosys, nextpnr and the bitstream documentation projects
15Low-power and small FPGAs
Milliwatt devices, sleep modes and power estimation
16Space and high-reliability FPGAs
Radiation effects, TMR, scrubbing and qualified parts
17Data centre and acceleration
SmartNICs, PCIe cards, CXL and the economics of offload
18eFPGA and adaptive ASICs
Programmable logic inside your own chip
19Boards and kits
How to choose a development board at any budget
20Careers and industry
Roles, skills, interviews and how the market is shaped